Some glitches of the assembler
Original Reporter info from Mantis: babysam
-
Reporter name: Sam Cheng
Original Reporter info from Mantis: babysam
- Reporter name: Sam Cheng
Description:
Hello everyone!
I am now trying to include more instructions to the assembler (by adding them to the x86ins.dat) I have noticed something related to the assembler:
- The maximum length of instruction names currently supported is 11. However, the name of some new instructions (e.g. the AESKEYGENASSIST in the Intel's AES-NI) are longer thn 11 characters. I have tried to add them directly but they will be ignored during the compilaion. (A warning is raised during compilation but it is difficult to be noticed at first)
The suspected line which have problem is
op2strtable=array[tasmop] of string[11]; (line 55, \compiler\x86\cpubase.pas)
by changing the number 11 to a larger number (15 would be enough for the present case, but to be safe I would suggest changing it to 20) the problem is resolved...
- The encoded syntax for UNPCKHPD is wrongly typed as mem,xmmreg, which should be xmmreg,mem instead according to the manuals (The usage should be the similar to UNPCKLPD)
Wrong Version:
[UNPCKHPD]
...
mem,xmmreg \300\1\x66\323\2\x0F\x15\110 WILLAMETTE,SSE2,SM
Correct Version(?):
(I don't know if it is correct or not as I don't know the exact meanings of the octal numbers even after reading the comments in the source)
[UNPCKHPD]
;The previous version set it as mem,xmmreg
xmmreg,mem \301\1\x66\323\2\x0F\x15\110 WILLAMETTE,SSE2,SM
- The assembler treating mm registers as vaild source/targets for SSE FP instructions (even when it is not "legal" to do so)
For example, the following will not trigger any errors
addps mm0,mm1 (Intel syntax, don't know the default ones have the same problem or not)
For the integer SIMD instructions, even if the mmx version of the instruction is not present in the x86ins.dat, the assembler will ignore the differences between mm registers and xmm registers and treat it as the 128-bit version.
- The support for 3-operand instruction is somewhat broken. For example, by adding the following line to the x86ins.dat will cause problem. The added instruction cannot be used in any case (and any register/memory combination)
The compiler will show the error "Invaild combination of opcode and operands"
[BLENDPS]
(Ch_All, Ch_None, Ch_None)
xmmreg,mem,imm \301\1\x66\323\3\x0F\x3A\x0C\110\26 SSE41,SM
xmmreg,xmmreg,imm \1\x66\323\3\x0F\x3A\x0C\110\26 SSE41
(never mind the extra SSE41 flag...I add it to make it clear)
However, nothing happens when I add the other three operand instructions, for example:
[DPPS]
(Ch_All, Ch_None, Ch_None)
xmmreg,mem,imm \301\1\x66\323\3\x0F\x3A\x40\110\26 SSE41,SM
xmmreg,xmmreg,imm \1\x66\323\3\x0F\x3A\x40\110\26 SSE41
It works after compilation.
After comparison, I found that by removing the following from the intermediate(?) file \compiler\i386\i386tab.inc, the added blendps will work...
Before: optypes : (ot_xmmreg,ot_memory or ot_signed,ot_immediate);
After: optypes : (ot_xmmreg,ot_memory,ot_immediate);
I don't know where I have introduced the ot_signed flag (no such thing in the dpps case), and changing the operands of the coded instruction do not solve the problem.
Thank you for reading the (somewhat) tedious materials!