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IDProjectCategoryView StatusLast Update
0033549FPCCompilerpublic2018-10-09 10:22
ReporterMarģersAssigned ToFlorian 
PrioritynormalSeverityminorReproducibilityalways
Status closedResolutionfixed 
Product VersionProduct Build 
Target VersionFixed in Version3.3.1 
Summary0033549: [FEATURE REQUEST] assembler: to add BMI2 instructions pdep, pext
DescriptionThere already are BMI2 instructions section in x86ins.dat
Don't know why, but not included instructions pdep, pext. I am writing some heavy number crunching and bit manipulating program. For me those instruction are particularity useful.

Feature request: to add BMI2 instructions pdep, pext for use in assembler section.
Tagsassembler, x86
Fixed in Revision39875
FPCOldBugId
FPCTarget
Attached Files
  • bmi2.patch (9,961 bytes)
    Index: compiler/i386/i386att.inc
    ===================================================================
    --- compiler/i386/i386att.inc	(revision 39854)
    +++ compiler/i386/i386att.inc	(working copy)
    @@ -1010,6 +1010,10 @@
     'andn',
     'bextr',
     'tzcnt',
    +'bzhi',
    +'mulx',
    +'pdep',
    +'pext',
     'rorx',
     'sarx',
     'shlx',
    Index: compiler/i386/i386atts.inc
    ===================================================================
    --- compiler/i386/i386atts.inc	(revision 39854)
    +++ compiler/i386/i386atts.inc	(working copy)
    @@ -1105,6 +1105,10 @@
     attsufNONE,
     attsufNONE,
     attsufNONE,
    +attsufNONE,
    +attsufNONE,
    +attsufNONE,
    +attsufNONE,
     attsufINT,
     attsufNONE,
     attsufNONE,
    Index: compiler/i386/i386int.inc
    ===================================================================
    --- compiler/i386/i386int.inc	(revision 39854)
    +++ compiler/i386/i386int.inc	(working copy)
    @@ -1010,6 +1010,10 @@
     'andn',
     'bextr',
     'tzcnt',
    +'bzhi',
    +'mulx',
    +'pdep',
    +'pext',
     'rorx',
     'sarx',
     'shlx',
    Index: compiler/i386/i386nop.inc
    ===================================================================
    --- compiler/i386/i386nop.inc	(revision 39854)
    +++ compiler/i386/i386nop.inc	(working copy)
    @@ -1,2 +1,2 @@
     { don't edit, this file is generated from x86ins.dat }
    -2117;
    +2121;
    Index: compiler/i386/i386op.inc
    ===================================================================
    --- compiler/i386/i386op.inc	(revision 39854)
    +++ compiler/i386/i386op.inc	(working copy)
    @@ -1010,6 +1010,10 @@
     A_ANDN,
     A_BEXTR,
     A_TZCNT,
    +A_BZHI,
    +A_MULX,
    +A_PDEP,
    +A_PEXT,
     A_RORX,
     A_SARX,
     A_SHLX,
    Index: compiler/i386/i386prop.inc
    ===================================================================
    --- compiler/i386/i386prop.inc	(revision 39854)
    +++ compiler/i386/i386prop.inc	(working copy)
    @@ -1010,6 +1010,10 @@
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Wop2, Ch_WFlags, Ch_Rop1]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    +(Ch: [Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Wop2]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    Index: compiler/i386/i386tab.inc
    ===================================================================
    --- compiler/i386/i386tab.inc	(revision 39854)
    +++ compiler/i386/i386tab.inc	(working copy)
    @@ -13616,6 +13616,34 @@
         flags   : [if_bmi1,if_sm]
       ),
       (
    +    opcode  : A_BZHI;
    +    ops     : 3;
    +    optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
    +    code    : #242#249#1#245#62#72;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_MULX;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #220#242#249#1#246#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_PDEP;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #220#242#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_PEXT;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #219#242#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
         opcode  : A_RORX;
         ops     : 3;
         optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_immediate or ot_bits8,ot_none);
    Index: compiler/x86/x86ins.dat
    ===================================================================
    --- compiler/x86/x86ins.dat	(revision 39854)
    +++ compiler/x86/x86ins.dat	(working copy)
    @@ -5293,10 +5293,30 @@
     ;********** BMI2 ***************************************************************
     ;*******************************************************************************
     
    +[BZHI]
    +(Ch_Rop1, Ch_Rop2, Ch_Wop3)
    +reg32,rm32,reg32                      \362\371\1\xf5\76\110               BMI2,PROT
    +reg64,rm64,reg64                      \362\363\371\1\xf5\76\110           BMI2,PROT,X86_64
    +
    +[MULX]
    +(Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3)
    +rm32,reg32,reg32                      \334\362\371\1\xf6\75\120           BMI2,PROT
    +rm64,reg64,reg64                      \334\362\363\371\1\xf6\75\120       BMI2,PROT,X86_64
    +
    +[PDEP]
    +(Ch_Rop1, Ch_Rop2, Ch_Wop3)
    +rm32,reg32,reg32                      \334\362\371\1\xf5\75\120           BMI2,PROT
    +rm64,reg64,reg64                      \334\362\363\371\1\xf5\75\120       BMI2,PROT,X86_64
    +
    +[PEXT]
    +(Ch_Rop1, Ch_Rop2, Ch_Wop3)
    +rm32,reg32,reg32                      \333\362\371\1\xf5\75\120           BMI2,PROT
    +rm64,reg64,reg64                      \333\362\363\371\1\xf5\75\120       BMI2,PROT,X86_64
    +
     [RORX]
     (Ch_Rop1, Ch_Wop2)
    -reg32,rm32,imm8                      \334\362\372\1\xf0\110\26            BMI2,PROT
    -reg64,rm64,imm8                      \334\362\363\372\1\xf0\110\26        BMI2,PROT,X86_64
    +reg32,rm32,imm8                       \334\362\372\1\xf0\110\26           BMI2,PROT
    +reg64,rm64,imm8                       \334\362\363\372\1\xf0\110\26       BMI2,PROT,X86_64
     
     [SARX]
     (Ch_Rop1, Ch_Rop2, Ch_Wop3)
    @@ -5303,12 +5323,12 @@
     reg32,rm32,reg32                      \333\362\371\1\xf7\76\110           BMI2,PROT
     reg64,rm64,reg64                      \333\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
     
    -[SHLX]
    +[SHLX]                                ; VEX.NDS.LZ.66.0F38.W0 F7 /r
     (Ch_Rop1, Ch_Rop2, Ch_Wop3)
     reg32,rm32,reg32                      \361\362\371\1\xf7\76\110           BMI2,PROT
     reg64,rm64,reg64                      \361\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
     
    -[SHRX]
    +[SHRX]                                ; VEX.NDS.LZ.F2.0F38.W0 F7 /r
     (Ch_Rop1, Ch_Rop2, Ch_Wop3)
     reg32,rm32,reg32                      \334\362\371\1\xf7\76\110           BMI2,PROT
     reg64,rm64,reg64                      \334\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
    Index: compiler/x86_64/x8664ats.inc
    ===================================================================
    --- compiler/x86_64/x8664ats.inc	(revision 39854)
    +++ compiler/x86_64/x8664ats.inc	(working copy)
    @@ -1101,6 +1101,10 @@
     attsufNONE,
     attsufNONE,
     attsufNONE,
    +attsufNONE,
    +attsufNONE,
    +attsufNONE,
    +attsufNONE,
     attsufINT,
     attsufNONE,
     attsufNONE,
    Index: compiler/x86_64/x8664att.inc
    ===================================================================
    --- compiler/x86_64/x8664att.inc	(revision 39854)
    +++ compiler/x86_64/x8664att.inc	(working copy)
    @@ -1006,6 +1006,10 @@
     'andn',
     'bextr',
     'tzcnt',
    +'bzhi',
    +'mulx',
    +'pdep',
    +'pext',
     'rorx',
     'sarx',
     'shlx',
    Index: compiler/x86_64/x8664int.inc
    ===================================================================
    --- compiler/x86_64/x8664int.inc	(revision 39854)
    +++ compiler/x86_64/x8664int.inc	(working copy)
    @@ -1006,6 +1006,10 @@
     'andn',
     'bextr',
     'tzcnt',
    +'bzhi',
    +'mulx',
    +'pdep',
    +'pext',
     'rorx',
     'sarx',
     'shlx',
    Index: compiler/x86_64/x8664nop.inc
    ===================================================================
    --- compiler/x86_64/x8664nop.inc	(revision 39854)
    +++ compiler/x86_64/x8664nop.inc	(working copy)
    @@ -1,2 +1,2 @@
     { don't edit, this file is generated from x86ins.dat }
    -2170;
    +2178;
    Index: compiler/x86_64/x8664op.inc
    ===================================================================
    --- compiler/x86_64/x8664op.inc	(revision 39854)
    +++ compiler/x86_64/x8664op.inc	(working copy)
    @@ -1006,6 +1006,10 @@
     A_ANDN,
     A_BEXTR,
     A_TZCNT,
    +A_BZHI,
    +A_MULX,
    +A_PDEP,
    +A_PEXT,
     A_RORX,
     A_SARX,
     A_SHLX,
    Index: compiler/x86_64/x8664pro.inc
    ===================================================================
    --- compiler/x86_64/x8664pro.inc	(revision 39854)
    +++ compiler/x86_64/x8664pro.inc	(working copy)
    @@ -1006,6 +1006,10 @@
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Wop2, Ch_WFlags, Ch_Rop1]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    +(Ch: [Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    +(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Wop2]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
     (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
    Index: compiler/x86_64/x8664tab.inc
    ===================================================================
    --- compiler/x86_64/x8664tab.inc	(revision 39854)
    +++ compiler/x86_64/x8664tab.inc	(working copy)
    @@ -13959,6 +13959,62 @@
         flags   : [if_bmi1,if_sm]
       ),
       (
    +    opcode  : A_BZHI;
    +    ops     : 3;
    +    optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
    +    code    : #242#249#1#245#62#72;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_BZHI;
    +    ops     : 3;
    +    optypes : (ot_reg64,ot_rm_gpr or ot_bits64,ot_reg64,ot_none);
    +    code    : #242#243#249#1#245#62#72;
    +    flags   : [if_bmi2,if_prot,if_x86_64]
    +  ),
    +  (
    +    opcode  : A_MULX;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #220#242#249#1#246#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_MULX;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
    +    code    : #220#242#243#249#1#246#61#80;
    +    flags   : [if_bmi2,if_prot,if_x86_64]
    +  ),
    +  (
    +    opcode  : A_PDEP;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #220#242#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_PDEP;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
    +    code    : #220#242#243#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot,if_x86_64]
    +  ),
    +  (
    +    opcode  : A_PEXT;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
    +    code    : #219#242#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot]
    +  ),
    +  (
    +    opcode  : A_PEXT;
    +    ops     : 3;
    +    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
    +    code    : #219#242#243#249#1#245#61#80;
    +    flags   : [if_bmi2,if_prot,if_x86_64]
    +  ),
    +  (
         opcode  : A_RORX;
         ops     : 3;
         optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_immediate or ot_bits8,ot_none);
    
    bmi2.patch (9,961 bytes)

Activities

J. Gareth Moreton

2018-10-06 08:11

developer   ~0111276

Last edited: 2018-10-06 08:18

View 2 revisions

Implemented missing BMI2 functions (also adding MULX and BZHI), although instructions are not fully tested yet due to lack of hardware support for this programmer. Nevertheless, instructions were compared against Microsoft Visual Studio's disassembly for the same instructions, and decoded from the Intel® 64 and IA-32 Architectures Software Developer’s Manual.

J. Gareth Moreton

2018-10-06 08:29

developer  

bmi2.patch (9,961 bytes)
Index: compiler/i386/i386att.inc
===================================================================
--- compiler/i386/i386att.inc	(revision 39854)
+++ compiler/i386/i386att.inc	(working copy)
@@ -1010,6 +1010,10 @@
 'andn',
 'bextr',
 'tzcnt',
+'bzhi',
+'mulx',
+'pdep',
+'pext',
 'rorx',
 'sarx',
 'shlx',
Index: compiler/i386/i386atts.inc
===================================================================
--- compiler/i386/i386atts.inc	(revision 39854)
+++ compiler/i386/i386atts.inc	(working copy)
@@ -1105,6 +1105,10 @@
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
 attsufINT,
 attsufNONE,
 attsufNONE,
Index: compiler/i386/i386int.inc
===================================================================
--- compiler/i386/i386int.inc	(revision 39854)
+++ compiler/i386/i386int.inc	(working copy)
@@ -1010,6 +1010,10 @@
 'andn',
 'bextr',
 'tzcnt',
+'bzhi',
+'mulx',
+'pdep',
+'pext',
 'rorx',
 'sarx',
 'shlx',
Index: compiler/i386/i386nop.inc
===================================================================
--- compiler/i386/i386nop.inc	(revision 39854)
+++ compiler/i386/i386nop.inc	(working copy)
@@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
-2117;
+2121;
Index: compiler/i386/i386op.inc
===================================================================
--- compiler/i386/i386op.inc	(revision 39854)
+++ compiler/i386/i386op.inc	(working copy)
@@ -1010,6 +1010,10 @@
 A_ANDN,
 A_BEXTR,
 A_TZCNT,
+A_BZHI,
+A_MULX,
+A_PDEP,
+A_PEXT,
 A_RORX,
 A_SARX,
 A_SHLX,
Index: compiler/i386/i386prop.inc
===================================================================
--- compiler/i386/i386prop.inc	(revision 39854)
+++ compiler/i386/i386prop.inc	(working copy)
@@ -1010,6 +1010,10 @@
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Wop2, Ch_WFlags, Ch_Rop1]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
+(Ch: [Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Wop2]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
Index: compiler/i386/i386tab.inc
===================================================================
--- compiler/i386/i386tab.inc	(revision 39854)
+++ compiler/i386/i386tab.inc	(working copy)
@@ -13616,6 +13616,34 @@
     flags   : [if_bmi1,if_sm]
   ),
   (
+    opcode  : A_BZHI;
+    ops     : 3;
+    optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
+    code    : #242#249#1#245#62#72;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_MULX;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #220#242#249#1#246#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_PDEP;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #220#242#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_PEXT;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #219#242#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
     opcode  : A_RORX;
     ops     : 3;
     optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_immediate or ot_bits8,ot_none);
Index: compiler/x86/x86ins.dat
===================================================================
--- compiler/x86/x86ins.dat	(revision 39854)
+++ compiler/x86/x86ins.dat	(working copy)
@@ -5293,10 +5293,30 @@
 ;********** BMI2 ***************************************************************
 ;*******************************************************************************
 
+[BZHI]
+(Ch_Rop1, Ch_Rop2, Ch_Wop3)
+reg32,rm32,reg32                      \362\371\1\xf5\76\110               BMI2,PROT
+reg64,rm64,reg64                      \362\363\371\1\xf5\76\110           BMI2,PROT,X86_64
+
+[MULX]
+(Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3)
+rm32,reg32,reg32                      \334\362\371\1\xf6\75\120           BMI2,PROT
+rm64,reg64,reg64                      \334\362\363\371\1\xf6\75\120       BMI2,PROT,X86_64
+
+[PDEP]
+(Ch_Rop1, Ch_Rop2, Ch_Wop3)
+rm32,reg32,reg32                      \334\362\371\1\xf5\75\120           BMI2,PROT
+rm64,reg64,reg64                      \334\362\363\371\1\xf5\75\120       BMI2,PROT,X86_64
+
+[PEXT]
+(Ch_Rop1, Ch_Rop2, Ch_Wop3)
+rm32,reg32,reg32                      \333\362\371\1\xf5\75\120           BMI2,PROT
+rm64,reg64,reg64                      \333\362\363\371\1\xf5\75\120       BMI2,PROT,X86_64
+
 [RORX]
 (Ch_Rop1, Ch_Wop2)
-reg32,rm32,imm8                      \334\362\372\1\xf0\110\26            BMI2,PROT
-reg64,rm64,imm8                      \334\362\363\372\1\xf0\110\26        BMI2,PROT,X86_64
+reg32,rm32,imm8                       \334\362\372\1\xf0\110\26           BMI2,PROT
+reg64,rm64,imm8                       \334\362\363\372\1\xf0\110\26       BMI2,PROT,X86_64
 
 [SARX]
 (Ch_Rop1, Ch_Rop2, Ch_Wop3)
@@ -5303,12 +5323,12 @@
 reg32,rm32,reg32                      \333\362\371\1\xf7\76\110           BMI2,PROT
 reg64,rm64,reg64                      \333\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
 
-[SHLX]
+[SHLX]                                ; VEX.NDS.LZ.66.0F38.W0 F7 /r
 (Ch_Rop1, Ch_Rop2, Ch_Wop3)
 reg32,rm32,reg32                      \361\362\371\1\xf7\76\110           BMI2,PROT
 reg64,rm64,reg64                      \361\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
 
-[SHRX]
+[SHRX]                                ; VEX.NDS.LZ.F2.0F38.W0 F7 /r
 (Ch_Rop1, Ch_Rop2, Ch_Wop3)
 reg32,rm32,reg32                      \334\362\371\1\xf7\76\110           BMI2,PROT
 reg64,rm64,reg64                      \334\362\363\371\1\xf7\76\110       BMI2,PROT,X86_64
Index: compiler/x86_64/x8664ats.inc
===================================================================
--- compiler/x86_64/x8664ats.inc	(revision 39854)
+++ compiler/x86_64/x8664ats.inc	(working copy)
@@ -1101,6 +1101,10 @@
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
 attsufINT,
 attsufNONE,
 attsufNONE,
Index: compiler/x86_64/x8664att.inc
===================================================================
--- compiler/x86_64/x8664att.inc	(revision 39854)
+++ compiler/x86_64/x8664att.inc	(working copy)
@@ -1006,6 +1006,10 @@
 'andn',
 'bextr',
 'tzcnt',
+'bzhi',
+'mulx',
+'pdep',
+'pext',
 'rorx',
 'sarx',
 'shlx',
Index: compiler/x86_64/x8664int.inc
===================================================================
--- compiler/x86_64/x8664int.inc	(revision 39854)
+++ compiler/x86_64/x8664int.inc	(working copy)
@@ -1006,6 +1006,10 @@
 'andn',
 'bextr',
 'tzcnt',
+'bzhi',
+'mulx',
+'pdep',
+'pext',
 'rorx',
 'sarx',
 'shlx',
Index: compiler/x86_64/x8664nop.inc
===================================================================
--- compiler/x86_64/x8664nop.inc	(revision 39854)
+++ compiler/x86_64/x8664nop.inc	(working copy)
@@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
-2170;
+2178;
Index: compiler/x86_64/x8664op.inc
===================================================================
--- compiler/x86_64/x8664op.inc	(revision 39854)
+++ compiler/x86_64/x8664op.inc	(working copy)
@@ -1006,6 +1006,10 @@
 A_ANDN,
 A_BEXTR,
 A_TZCNT,
+A_BZHI,
+A_MULX,
+A_PDEP,
+A_PEXT,
 A_RORX,
 A_SARX,
 A_SHLX,
Index: compiler/x86_64/x8664pro.inc
===================================================================
--- compiler/x86_64/x8664pro.inc	(revision 39854)
+++ compiler/x86_64/x8664pro.inc	(working copy)
@@ -1006,6 +1006,10 @@
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Wop2, Ch_WFlags, Ch_Rop1]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
+(Ch: [Ch_REDX, Ch_Rop1, Ch_Wop2, Ch_Wop3]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
+(Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Wop2]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
 (Ch: [Ch_Rop1, Ch_Rop2, Ch_Wop3]),
Index: compiler/x86_64/x8664tab.inc
===================================================================
--- compiler/x86_64/x8664tab.inc	(revision 39854)
+++ compiler/x86_64/x8664tab.inc	(working copy)
@@ -13959,6 +13959,62 @@
     flags   : [if_bmi1,if_sm]
   ),
   (
+    opcode  : A_BZHI;
+    ops     : 3;
+    optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_reg32,ot_none);
+    code    : #242#249#1#245#62#72;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_BZHI;
+    ops     : 3;
+    optypes : (ot_reg64,ot_rm_gpr or ot_bits64,ot_reg64,ot_none);
+    code    : #242#243#249#1#245#62#72;
+    flags   : [if_bmi2,if_prot,if_x86_64]
+  ),
+  (
+    opcode  : A_MULX;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #220#242#249#1#246#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_MULX;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
+    code    : #220#242#243#249#1#246#61#80;
+    flags   : [if_bmi2,if_prot,if_x86_64]
+  ),
+  (
+    opcode  : A_PDEP;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #220#242#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_PDEP;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
+    code    : #220#242#243#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot,if_x86_64]
+  ),
+  (
+    opcode  : A_PEXT;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits32,ot_reg32,ot_reg32,ot_none);
+    code    : #219#242#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot]
+  ),
+  (
+    opcode  : A_PEXT;
+    ops     : 3;
+    optypes : (ot_rm_gpr or ot_bits64,ot_reg64,ot_reg64,ot_none);
+    code    : #219#242#243#249#1#245#61#80;
+    flags   : [if_bmi2,if_prot,if_x86_64]
+  ),
+  (
     opcode  : A_RORX;
     ops     : 3;
     optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_immediate or ot_bits8,ot_none);
bmi2.patch (9,961 bytes)

J. Gareth Moreton

2018-10-06 08:30

developer   ~0111277

Assigned to Florian for patch evaluation.

Florian

2018-10-07 12:11

administrator   ~0111296

Applied with some changes.

Issue History

Date Modified Username Field Change
2018-04-02 19:21 Marģers New Issue
2018-05-09 02:05 J. Gareth Moreton Tag Attached: assembler
2018-05-09 02:05 J. Gareth Moreton Tag Attached: x86
2018-05-09 02:05 J. Gareth Moreton Assigned To => J. Gareth Moreton
2018-05-09 02:05 J. Gareth Moreton Status new => assigned
2018-10-06 08:08 J. Gareth Moreton File Added: bmi2.patch
2018-10-06 08:11 J. Gareth Moreton Note Added: 0111276
2018-10-06 08:11 J. Gareth Moreton Status assigned => resolved
2018-10-06 08:11 J. Gareth Moreton Fixed in Version => 3.3.1
2018-10-06 08:11 J. Gareth Moreton Resolution open => fixed
2018-10-06 08:16 J. Gareth Moreton Status resolved => feedback
2018-10-06 08:16 J. Gareth Moreton Resolution fixed => reopened
2018-10-06 08:18 J. Gareth Moreton Status feedback => assigned
2018-10-06 08:18 J. Gareth Moreton File Deleted: bmi2.patch
2018-10-06 08:18 J. Gareth Moreton Note Edited: 0111276 View Revisions
2018-10-06 08:29 J. Gareth Moreton File Added: bmi2.patch
2018-10-06 08:29 J. Gareth Moreton Status assigned => resolved
2018-10-06 08:29 J. Gareth Moreton Resolution reopened => fixed
2018-10-06 08:30 J. Gareth Moreton Assigned To J. Gareth Moreton => Florian
2018-10-06 08:30 J. Gareth Moreton Note Added: 0111277
2018-10-06 08:30 J. Gareth Moreton Status resolved => feedback
2018-10-06 08:30 J. Gareth Moreton Resolution fixed => reopened
2018-10-06 08:30 J. Gareth Moreton Status feedback => resolved
2018-10-06 08:30 J. Gareth Moreton Resolution reopened => fixed
2018-10-07 12:11 Florian Fixed in Revision => 39875
2018-10-07 12:11 Florian Note Added: 0111296
2018-10-09 10:22 Marģers Status resolved => closed