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IDProjectCategoryView StatusLast Update
0034647FPCCompilerpublic2019-12-26 22:12
ReporterSimon Kissel Assigned ToFlorian  
PrioritynormalSeverityminorReproducibilityalways
Status resolvedResolutionfixed 
Platformi386-linux 
Product Version3.3.1 
Summary0034647: Lots of valid assembler opcodes no longer recognized
DescriptionIn 3.3.1, a lot of perfectly valid assembler opcodes are no longer
recognized (no matter if the internal or external assembler is used):

Examples of failing assembler instructions:

SBMath.pas(1932,9) Error: Asm: [cmp imm32,imm8s] invalid combination of opcode and operands
SBMath.pas(1934,5) Error: Asm: [lea reg32,imm32] invalid combination of opcode and operands
SBMath.pas(1948,5) Error: Asm: [lea reg32,imm32] invalid combination of opcode and operands

The attached test project (SBMath.pas is a commercial component, so I can share it) produces

sggZlib.pas(461,3) Error: Asm: [lea reg32,imm32] invalid combination of opcode and operands


Please note that once you comment out the assembler code, instead Internal error 200603253 will be thrown.
For this, see:

https://bugs.freepascal.org/view.php?id=34646
Steps To ReproduceEdit the .fpccfg-i386 config file to match your compiler paths, modify crash_i386.bat, then run crash_i386.bat
TagsNo tags attached.
Fixed in Revision
FPCOldBugId
FPCTarget-
Attached Files

Activities

Simon Kissel

2018-12-04 20:31

reporter  

fpc-broken.zip (99,729 bytes)

Simon Kissel

2018-12-04 20:32

reporter   ~0112358

Please note that in 3.0.5, the assembler opcodes are recognized just fine.

J. Gareth Moreton

2018-12-04 22:10

developer   ~0112360

I'm just looking at the Intel® 64 and IA-32 Architectures
Software Developer’s Manual, what I consider to be the definitive source for x86_64 assembler opcodes. According to Vol. 2A, Page 3-529, the LEA examples given are actually invalid. The valid forms are (in Intel format, so reverse to what the compiler states):

LEA r16,m
LEA r32,m
LEA r64,m

Where m is a memory reference. Granted, saying that, I think there is a way to encode a reference that contains just an offset and no registers, at least as far as the machine code is concerned, but I'm not sure how the assembler would handle that.

In most situations, you'd want to convert "LEA reg, imm" into "MOV reg, imm". The only difference between the two is that MOV uses an ALU on the processor, while LEA uses an AGU.

Florian

2019-01-06 22:42

administrator   ~0113225

For now -Aas should be help, the internal assembler writer does not support the tls relocations yet.

Florian

2019-12-26 22:12

administrator   ~0120075

Should be fixed meanwhile.

Issue History

Date Modified Username Field Change
2018-12-04 20:31 Simon Kissel New Issue
2018-12-04 20:31 Simon Kissel File Added: fpc-broken.zip
2018-12-04 20:32 Simon Kissel Note Added: 0112358
2018-12-04 22:10 J. Gareth Moreton Note Added: 0112360
2019-01-06 22:42 Florian Note Added: 0113225
2019-12-26 22:12 Florian Assigned To => Florian
2019-12-26 22:12 Florian Status new => resolved
2019-12-26 22:12 Florian Resolution open => fixed
2019-12-26 22:12 Florian FPCTarget => -
2019-12-26 22:12 Florian Note Added: 0120075