[Patch] Efficiency boosts in post-peephole optimisation stage
Original Reporter info from Mantis: CuriousKit @CuriousKit
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Reporter name: J. Gareth Moreton
Original Reporter info from Mantis: CuriousKit @CuriousKit
- Reporter name: J. Gareth Moreton
Description:
This patch makes some general-purpose changes to the post-peephole optimisation stage. since this stage is only meant as a final chance to convert instructions to more efficient forms. As a result, if the current list entry is not an instruction, it no longer calls the platform-specific PostPeepholeOptsCPU.
As an additional note, keeping track of the registers one instruction ahead proved to be less efficient both in terms of compiler speed and instruction conversion. On x86 platforms, certain "mov $0,%reg" instructions weren't being converted to "xor %reg,%reg" because a comparison instruction immediately followed (the FLAGS register gets allocated, implying that using xor would scramble it, even though it's not an issue here).
Steps to reproduce:
Apply patch and confirm correct compilation and testing.
Additional information:
i386-win32 and x86_64-win64 compile without problems, and "make fullcycle" is successful. Individual PostPeepholeOptsCPU routines were evaluated to determine if the register tracking changes would cause any adverse effects, which none were found.
Mantis conversion info:
- Mantis ID: 36437
- OS: Microsoft Windows
- OS Build: 10 Professional
- Build: r43679
- Platform: Cross-platform
- Version: 3.3.1
- Monitored by: » etrusco (Flávio Etrusco)