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IDProjectCategoryView StatusLast Update
0037130FPCCompilerpublic2020-05-23 11:49
ReporterChristo Crause Assigned To 
PrioritynormalSeverityminorReproducibilityN/A
Status newResolutionopen 
Product Version3.3.1 
Summary0037130: Xtensa [patch] Add optional MAC16 registers to compiler
DescriptionAttached please find a patch that adds register definitions for the optional MAC16 registers. Also attached a small assembler test case to exercise the compiler.
TagsNo tags attached.
Fixed in Revision
FPCOldBugId
FPCTarget
Attached Files

Activities

Christo Crause

2020-05-23 11:49

reporter  

xtensaMAC16-registers.patch (3,368 bytes)   
Index: ../cgbase.pas
===================================================================
--- ../cgbase.pas	(revision 45312)
+++ ../cgbase.pas	(working copy)
@@ -212,7 +212,9 @@
         { used on llvm, every temp gets its own "base register" }
         R_TEMPREGISTER,    { = 7 }
         { used on llvm for tracking metadata (every unique metadata has its own base register) }
-        R_METADATAREGISTER { = 8 }
+        R_METADATAREGISTER,{ = 8 }
+        { optional MAC16 (16 bit multiply-accumulate) registers on Xtensa }
+        R_MAC16REGISTER    { = 9 }
       );
 
       { Sub registers }
Index: xtensareg.dat
===================================================================
--- xtensareg.dat	(revision 45312)
+++ xtensareg.dat	(working copy)
@@ -59,3 +59,9 @@
 B14,$05,$00,$0e,b14,14,14
 B15,$05,$00,$0f,b15,15,15
 
+; MAC16 registers
+M0,$09,$00,$00,m0,0,0
+M1,$09,$00,$01,m1,1,1
+M2,$09,$00,$02,m2,2,2
+M3,$09,$00,$03,m3,3,3
+
Index: rxtensacon.inc
===================================================================
--- rxtensacon.inc	(revision 45312)
+++ rxtensacon.inc	(working copy)
@@ -48,3 +48,7 @@
 NR_B13 = tregister($0500000d);
 NR_B14 = tregister($0500000e);
 NR_B15 = tregister($0500000f);
+NR_M0 = tregister($09000000);
+NR_M1 = tregister($09000001);
+NR_M2 = tregister($09000002);
+NR_M3 = tregister($09000003);
Index: rxtensasup.inc
===================================================================
--- rxtensasup.inc	(revision 45312)
+++ rxtensasup.inc	(working copy)
@@ -48,3 +48,7 @@
 RS_B13 = $0d;
 RS_B14 = $0e;
 RS_B15 = $0f;
+RS_M0 = $00;
+RS_M1 = $01;
+RS_M2 = $02;
+RS_M3 = $03;
Index: rxtensanum.inc
===================================================================
--- rxtensanum.inc	(revision 45312)
+++ rxtensanum.inc	(working copy)
@@ -47,4 +47,8 @@
 tregister($0500000c),
 tregister($0500000d),
 tregister($0500000e),
-tregister($0500000f)
+tregister($0500000f),
+tregister($09000000),
+tregister($09000001),
+tregister($09000002),
+tregister($09000003)
Index: rxtensastd.inc
===================================================================
--- rxtensastd.inc	(revision 45312)
+++ rxtensastd.inc	(working copy)
@@ -47,4 +47,8 @@
 'b12',
 'b13',
 'b14',
-'b15'
+'b15',
+'m0',
+'m1',
+'m2',
+'m3'
Index: rxtensasta.inc
===================================================================
--- rxtensasta.inc	(revision 45312)
+++ rxtensasta.inc	(working copy)
@@ -47,4 +47,8 @@
 12,
 13,
 14,
-15
+15,
+0,
+1,
+2,
+3
Index: rxtensadwa.inc
===================================================================
--- rxtensadwa.inc	(revision 45312)
+++ rxtensadwa.inc	(working copy)
@@ -47,4 +47,8 @@
 12,
 13,
 14,
-15
+15,
+0,
+1,
+2,
+3
Index: rxtensanor.inc
===================================================================
--- rxtensanor.inc	(revision 45312)
+++ rxtensanor.inc	(working copy)
@@ -1,2 +1,2 @@
 { don't edit, this file is generated from xtensareg.dat }
-49
+53
Index: rxtensarni.inc
===================================================================
--- rxtensarni.inc	(revision 45312)
+++ rxtensarni.inc	(working copy)
@@ -47,4 +47,8 @@
 45,
 46,
 47,
-48
+48,
+49,
+50,
+51,
+52
Index: rxtensasri.inc
===================================================================
--- rxtensasri.inc	(revision 45312)
+++ rxtensasri.inc	(working copy)
@@ -47,4 +47,8 @@
 23,
 24,
 25,
-26
+26,
+49,
+50,
+51,
+52
xtensaMAC16-registers.patch (3,368 bytes)   
mac16test.pas (674 bytes)   
unit mac16test;

interface

procedure testMAC16;

implementation

procedure testMAC16; assembler;
asm
  mula.aa.ll a3, a4
  mula.ad.ll a3, m2                // my in [m2, m3]
  mula.da.ll m1, a3                // mx in [m0, m1]
  mula.dd.ll m1, m3                // mx in [m0, m1], my in [m2, m3]
  mula.da.ll.lddec m1, a5, m3, a6  // mw in [m0..m3], mx in [m0, m1], my in [m2, m3]
  mula.dd.ll.ldinc m3, a5, m0, m2  // mw in [m0..m3], mx in [m0, m1], my in [m2, m3]
  muls.aa.hh a4, a5
  muls.ad.hl a4, m2                // my in [m2, m3]
  muls.da.lh m0, a4                // mx in [m0, m1]
  muls.dd.hl m0, m2                // mx in [m0, m1], my in [m2, m3]
end;

end.

mac16test.pas (674 bytes)   

Issue History

Date Modified Username Field Change
2020-05-23 11:49 Christo Crause New Issue
2020-05-23 11:49 Christo Crause File Added: xtensaMAC16-registers.patch
2020-05-23 11:49 Christo Crause File Added: mac16test.pas