[Patch] LDR/STR pairing optimisation for AArch64
Original Reporter info from Mantis: CuriousKit @CuriousKit
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Reporter name: J. Gareth Moreton
Original Reporter info from Mantis: CuriousKit @CuriousKit
- Reporter name: J. Gareth Moreton
Description:
This patch looks at groups of LDR and STR instructions and attempts to pair them into LDP and STP instructions if they read from contiguous memory, while making sure it doesn't make combinations that are undefined (e.g. an LDP instruction where both destination registers are the same) or incorrect (the address register is modified in between).
Steps to reproduce:
Apply patch and confirm correct compilation and improved optimisation.
Additional information:
This optimisation is run in pass 2 so future optimisations that affect LDR and STR instructions on an individual basis are more efficient. Additionally, I cannot make too much progress just yet on pass 1 optimisations until #37526 (closed) is approved or rejected, so I know what to branch off of.
Test suite has been run under aarch64-linux and shows no regressions.
Mantis conversion info:
- Mantis ID: 37580
- OS: Linux (Raspberry Pi OS)
- OS Build: 5.4.51-v8+
- Build: r46453
- Platform: aarch64
- Version: 3.3.1
- Fixed in version: 3.3.1
- Fixed in revision: 46917 (#4de5195a)