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IDProjectCategoryView StatusLast Update
0038348FPCCompilerpublic2021-01-12 23:11
ReporterBernd Assigned To 
PrioritynormalSeverityminorReproducibilityalways
Status newResolutionopen 
PlatformRISC-VOSEmbedded 
Product Version3.3.1 
Summary0038348: RISC-V Embedded, procedure epilogue conflicts with interrupts.
DescriptionAn empty dummy procedure compiles to the following assembler output:

# [145] begin
    addi x2,x2,-8
    sw x1,4(x2)
    sw x8,0(x2)
    addi x8,x2,8
    addi x2,x2,-52
# [146] end;
    addi x2,x8,0 // resets stack pointer
            
      // An Interrupt here leads to a crash
    lw x8,-8(x2)
    lw x1,-4(x2)
    jalr x0,x1

When the stack pointer is reset to its origin in the epilogue of the procedure, there are still two registers at location -8(x2) and -4(x2) which have to be restored. If an interrupt occurs right after the addi x2,x8,0 instruction, it will overwrite these two locations with its own stack frame and the program is going to crash on interrupt return.
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Fixed in Revision
FPCOldBugId
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Date Modified Username Field Change
2021-01-12 23:11 Bernd New Issue