[Patch] AArch64 incorrect number generation fix
Original Reporter info from Mantis: CuriousKit @CuriousKit
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Reporter name: J. Gareth Moreton
Original Reporter info from Mantis: CuriousKit @CuriousKit
- Reporter name: J. Gareth Moreton
Description:
This patch fixes a bug in AArch64's a_load_const_reg routine where certain constants were not encoded properly. This, ironically, manifested in a_load_const_reg itself and caused inefficient (but correct) code generation for other numbers.
Steps to reproduce:
Apply patch and confirm both correct code compilation and more efficient constant generation in the system unit's disassembly (among other things).
Additional information:
In the aforementioned a_load_const_reg routine, the constant $0000FFFFFFFEFFFF was instead generated as $FFFEFFFFFFFEFFFF, causing a case block to not be evaluated correctly. The class of numbers that were incorrectly encoded are those where replacing the upper 16 bits with the 2nd lowest 16 bits produced a valid shifter constant, since this could be encoded compactly as (using $0000FFFFFFFEFFFF as an example):
orr x0,xzr,0xFFFEFFFFFFFEFFFF
movk x0,0,lsl 48
Previously, the "movk" instruction was erroneously omitted if the upper 16 bits were zero.
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For an inefficient code example, the System unit had many such constants - for the number 18.874,385 ($01200011):
movn x1,65518
movk x1,288,lsl 16
movk x1,0,lsl 32
movk x1,0,lsl 48
This patch now allows the routine to properly encode the constant as expected:
movz x1,17
movk x1,288,lsl 16
Mantis conversion info:
- Mantis ID: 38695
- OS: LInux (Raspberry Pi OS)
- OS Build: 5.4.51-v8+
- Build: r49099
- Platform: aarch64-linux
- Version: 3.3.1
- Fixed in version: 3.3.1
- Fixed in revision: 49104 (#f0023a3b)